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1. Commits on Oct 13, 2026

   • Reland "[compiler-rt][asan] Add asan checks for __builtin_assume_dereferencable" (#224163)

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     PiJoules

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   • [ProfCheck] Update XFAIL list (#231328)

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     boomanaiden154

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2. Commits on Oct 12, 2026

   • [lldb] Add jLLDBSettings remote packet (#229179)

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     satyajanga

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   • [RISCV][P-ext] Remove RISCVISD::PPAIROE_H. NFC (#230356)

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     topperc

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   • [RISCV][P-ext] Combine MHACC_H_B0 and MHACC_W_H0. NFC (#230362)

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     topperc

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   • [AMDGPU] Limit the fmul fusion discount to a matching context type (#229845)

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     MrSidims

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   • [compiler-rt][ARM] Mark optimized FP add/sub asm as superseding aeabi_[df]rsub.c (#230739)

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     Sharjeel-Khan

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   • [VPlan] Simplify extracts of the last lane of live-ins (#231312)

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     fhahn

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   • [llvm][test] Add -filetype=null to llc disable-mir-output-verify test (#231305)

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     EmmanuelAC1

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   • [LAA] Include the load types of written pointers in runtime check bounds. (#231039)

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     fhahn

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   • [LV] Allow stride-scaled canonical IV users when preparing the epilogue (#231307)

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     fhahn

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   • [LV] Add test for FindIV reduction with wrapping truncated IV (NFC). (#231297)

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     fhahn

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   • [AMDGPU][NFC] Clean up packed convert tests (#229178)

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     chinmaydd

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   • TableGen: Pack the RecordVal used flag with its type (#231288)

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     claude

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   • AMDGPU: Only use 16-bit atomic loads when D16 preserves unused bits (#230944)

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     arsenm

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     claude

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   • [MISched] Fix cluster dump crash (#231176)

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     tomershafir

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   • [AMDGPU] Make xnack-support generic any feature. NFCI (#231290)

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     rampitec

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   • [bazel][lldb] Add PluginObjectFilePECOFF dep to PluginDynamicLoaderWindowsDYLD (#231296)

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     EmmanuelAC1

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   • [DAG] isConstOrConstSplat - add handling for ISD::MERGE_VALUES nodes (#231220)

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     RKSimon

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   • [SampleProf] Accumulate vtable type counts for FS-discriminator-collapsed locations (#230380)

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     kazutakahirata

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   • [AMDGPU] Refactor builtin tests for gfx1310 runs. NFC (#231284)

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     chinmaydd

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   • [AggressiveInstCombine] Match ctpop table lookups (#231225)

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     lukel97

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   • AMDGPU: Promote 16-bit atomic load/store to extending i32 (#230943)

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     arsenm

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     claude

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   • [llvm] Use a separate macro for LLVM C exports (#230090)

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     Steelskin

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   • [InstCombine] Fix profiles for SPFs in FoldSelectWithAndOrCond (#231280)

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     boomanaiden154

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   • LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (#127399)

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     RonDahan101

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   • llc: Make disable-mir-output-verify test require x86 be built (#231286)

     arsenm

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   • unittests: Add more logging for failing plugin tests (#229945)

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     tstellar

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   • [mlir][tosa] Add MXFP support for CONV3D (#230148)

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     deeptanshusekhri

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   • [mlir][tosa] remove duplicate CONV2D compliance entries (#231152)

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     deeptanshusekhri

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   • AMDGPU: Fix true16 build_vector (0, x) pattern using a 16-bit shift operand (#230383)

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     arsenm

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     claude

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   • AMDGPU: Regenerate test checks after flag changes (#231281)

     arsenm

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   • [CIR][NFC] Fix missing argument to llvm::LoadOP (#231266)

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     AmrDeveloper

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   • [RISCV][GISel] Add CFProtectionBranch support to legalizeBRJT. (#229311)

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     topperc

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   • [RISCV][P-ext] Combine RISCVISD::MQACC_00 and PMQACC_W_H00. NFC (#230368)

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     topperc

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