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Merge pull request #385 from ainyan03/release_0.2.25 · m5stack/M5Unified@fd40d58 · GitHub
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lovyan03lovyan03
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Merge pull request #385 from ainyan03/release_0.2.25
Release 0.2.25
2 parents 44d0c52 + c11ea6c commit fd40d58

12 files changed

Lines changed: 100 additions & 64 deletions

‎idf_component.yml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@ description: Unified library for M5Stack series
22
issues: https://github.com/m5stack/M5Unified/issues
33
repository: https://github.com/m5stack/M5Unified.git
44
url: https://github.com/m5stack/M5Unified.git
5-
version: 0.2.24
5+
version: 0.2.25
66
dependencies:
77
m5stack/m5gfx:
88
version: ">=0.2.31"

‎library.json‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
"version": ">=0.2.31"
1717
}
1818
],
19-
"version": "0.2.24",
19+
"version": "0.2.25",
2020
"frameworks": ["arduino", "espidf", "*"],
2121
"platforms": ["espressif32", "native"],
2222
"headers": "M5Unified.h"

‎library.properties‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
name=M5Unified
2-
version=0.2.24
2+
version=0.2.25
33
author=M5Stack
44
maintainer=M5Stack
55
sentence=Unified library for M5Stack series

‎src/M5Unified.hpp‎

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -356,9 +356,16 @@ namespace m5
356356
// Boards where GPIO46 is exposed to the application (camera VSYNC on CoreS3, camera data on
357357
// AtomS3R Cam, header pin on StampS3 / AtomS3R Ext) get the pad restored once the board is
358358
// known, see below.
359+
// Skipped when the application already ran Display.init(): GPIO46 may then carry the display
360+
// bus (StopWatch QSPI io2), which this output would overwrite. The hold is applied below,
361+
// once the pin map is known, only on boards that use GPIO46 as their power hold.
362+
const bool gpio46_hold = (Display.getBoard() == m5gfx::board_t::board_unknown);
359363
m5gfx::gpio::pin_backup_t gpio46_backup(GPIO_NUM_46);
360-
m5gfx::gpio_hi(GPIO_NUM_46);
361-
m5gfx::pinMode(GPIO_NUM_46, m5gfx::pin_mode_t::output);
364+
if (gpio46_hold)
365+
{
366+
m5gfx::gpio_hi(GPIO_NUM_46);
367+
m5gfx::pinMode(GPIO_NUM_46, m5gfx::pin_mode_t::output);
368+
}
362369
#endif
363370

364371
auto brightness = Display.getBrightness();
@@ -376,10 +383,15 @@ namespace m5
376383
_board = board;
377384
_setup_pinmap(board);
378385
#if defined ( CONFIG_IDF_TARGET_ESP32S3 )
386+
if (!gpio46_hold && getPin(pin_name_t::power_hold) == GPIO_NUM_46)
387+
{
388+
m5gfx::gpio_hi(GPIO_NUM_46);
389+
m5gfx::pinMode(GPIO_NUM_46, m5gfx::pin_mode_t::output);
390+
}
379391
// Restore only on boards positively identified as exposing GPIO46 to the application
380392
// (camera VSYNC / data, header pin); every other case (power hold, display bus pins
381393
// configured by Display.init(), a fallback board) keeps the previous behaviour.
382-
switch (board_detected ? board : board_t::board_unknown)
394+
switch (board_detected && gpio46_hold ? board : board_t::board_unknown)
383395
{
384396
case board_t::board_M5StackCoreS3:
385397
case board_t::board_M5StackCoreS3SE:

‎src/M5Unified.inl‎

Lines changed: 11 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -145,9 +145,7 @@ static constexpr const uint8_t _pin_table_i2c_ex_in[][5] = {
145145
{ board_t::board_M5StampC5 , 255 ,255 , 255 ,255 },
146146
{ board_t::board_M5ToughC5 , GPIO_NUM_3 ,GPIO_NUM_2 , GPIO_NUM_3 ,GPIO_NUM_2 }, // PortA は内部バスと同一 (レベルシフタ経由の物理分配)
147147
{ board_t::board_unknown , 255 ,255 , 255 ,255 },
148-
#elif defined (CONFIG_IDF_TARGET_ESP32S2)
149-
{ board_t::board_unknown , 255 ,255 , 255 ,255 },
150-
#else
148+
#elif !defined (CONFIG_IDF_TARGET) || defined (CONFIG_IDF_TARGET_ESP32)
151149
{ board_t::board_M5Stack , GPIO_NUM_22,GPIO_NUM_21 , GPIO_NUM_22,GPIO_NUM_21 },
152150
{ board_t::board_M5Paper , GPIO_NUM_22,GPIO_NUM_21 , GPIO_NUM_32,GPIO_NUM_25 },
153151
{ board_t::board_M5TimerCam , GPIO_NUM_14,GPIO_NUM_12 , GPIO_NUM_13,GPIO_NUM_4 },
@@ -157,6 +155,10 @@ static constexpr const uint8_t _pin_table_i2c_ex_in[][5] = {
157155
{ board_t::board_M5AtomU , GPIO_NUM_21,GPIO_NUM_25 , GPIO_NUM_32,GPIO_NUM_26 },
158156
{ board_t::board_M5AtomPsram , GPIO_NUM_21,GPIO_NUM_25 , GPIO_NUM_32,GPIO_NUM_26 },
159157
{ board_t::board_unknown , GPIO_NUM_22,GPIO_NUM_21 , GPIO_NUM_33,GPIO_NUM_32 }, // Core2,Tough,StickC,CoreInk,Station,StampPico
158+
#else
159+
// A chip without boards of its own: nothing to probe. Kept explicit so that it never
160+
// inherits the ESP32 table above.
161+
{ board_t::board_unknown , 255 ,255 , 255 ,255 },
160162
#endif
161163
};
162164

@@ -180,8 +182,7 @@ static constexpr const uint8_t _pin_table_port_bc[][5] = {
180182
{ board_t::board_M5Tab5 , GPIO_NUM_17,GPIO_NUM_52, GPIO_NUM_7 ,GPIO_NUM_6 }, // Tab5
181183
#elif defined (CONFIG_IDF_TARGET_ESP32C5)
182184
{ board_t::board_M5ToughC5 , GPIO_NUM_1 ,GPIO_NUM_6 , GPIO_NUM_12,GPIO_NUM_11 },
183-
#elif defined (CONFIG_IDF_TARGET_ESP32S2)
184-
#else
185+
#elif !defined (CONFIG_IDF_TARGET) || defined (CONFIG_IDF_TARGET_ESP32)
185186
{ board_t::board_M5Stack , GPIO_NUM_36,GPIO_NUM_26 , GPIO_NUM_16,GPIO_NUM_17 },
186187
{ board_t::board_M5StackCore2 , GPIO_NUM_36,GPIO_NUM_26 , GPIO_NUM_13,GPIO_NUM_14 },
187188
{ board_t::board_M5Tough , GPIO_NUM_36,GPIO_NUM_26 , GPIO_NUM_13,GPIO_NUM_14 },
@@ -202,8 +203,7 @@ static constexpr const uint8_t _pin_table_port_de[][5] = {
202203
#elif defined (CONFIG_IDF_TARGET_ESP32C61)
203204
#elif defined (CONFIG_IDF_TARGET_ESP32H2)
204205
#elif defined (CONFIG_IDF_TARGET_ESP32C5)
205-
#elif defined (CONFIG_IDF_TARGET_ESP32S2)
206-
#else
206+
#elif !defined (CONFIG_IDF_TARGET) || defined (CONFIG_IDF_TARGET_ESP32)
207207
{ board_t::board_M5Stack , GPIO_NUM_34,GPIO_NUM_35 , GPIO_NUM_5 ,GPIO_NUM_13 },
208208
{ board_t::board_M5StackCore2 , GPIO_NUM_34,GPIO_NUM_35 , GPIO_NUM_27,GPIO_NUM_19 },
209209
{ board_t::board_M5Station , GPIO_NUM_36,GPIO_NUM_26 , GPIO_NUM_16,GPIO_NUM_17 }, // B2 / C2
@@ -235,8 +235,7 @@ static constexpr const uint8_t _pin_table_sd[][7] = {
235235
{ board_t::board_M5Tab5 , GPIO_NUM_43, GPIO_NUM_44, GPIO_NUM_39, GPIO_NUM_40, GPIO_NUM_41, GPIO_NUM_42 },
236236
#elif defined (CONFIG_IDF_TARGET_ESP32C5)
237237
{ board_t::board_M5ToughC5 , GPIO_NUM_9 , GPIO_NUM_7 , GPIO_NUM_8 , 255 , 255 , GPIO_NUM_10 },
238-
#elif defined (CONFIG_IDF_TARGET_ESP32S2)
239-
#else
238+
#elif !defined (CONFIG_IDF_TARGET) || defined (CONFIG_IDF_TARGET_ESP32)
240239
{ board_t::board_M5Stack , GPIO_NUM_18, GPIO_NUM_23, GPIO_NUM_19, 255 , 255 , GPIO_NUM_4 },
241240
{ board_t::board_M5StackCore2 , GPIO_NUM_18, GPIO_NUM_23, GPIO_NUM_38, 255 , 255 , GPIO_NUM_4 },
242241
{ board_t::board_M5Tough , GPIO_NUM_18, GPIO_NUM_23, GPIO_NUM_38, 255 , 255 , GPIO_NUM_4 },
@@ -269,8 +268,7 @@ static constexpr const uint8_t _pin_table_other0[][2] = {
269268
#elif defined (CONFIG_IDF_TARGET_ESP32H2)
270269
{ board_t::board_M5NanoH2 , GPIO_NUM_11 },
271270
#elif defined (CONFIG_IDF_TARGET_ESP32C5)
272-
#elif defined (CONFIG_IDF_TARGET_ESP32S2)
273-
#else
271+
#elif !defined (CONFIG_IDF_TARGET) || defined (CONFIG_IDF_TARGET_ESP32)
274272
{ board_t::board_M5Stack , GPIO_NUM_15 },
275273
{ board_t::board_M5StackCore2 , GPIO_NUM_25 },
276274
{ board_t::board_M5Station , GPIO_NUM_4 },
@@ -298,8 +296,7 @@ static constexpr const uint8_t _pin_table_other1[][2] = {
298296
#elif defined (CONFIG_IDF_TARGET_ESP32C61)
299297
#elif defined (CONFIG_IDF_TARGET_ESP32H2)
300298
#elif defined (CONFIG_IDF_TARGET_ESP32C5)
301-
#elif defined (CONFIG_IDF_TARGET_ESP32S2)
302-
#else
299+
#elif !defined (CONFIG_IDF_TARGET) || defined (CONFIG_IDF_TARGET_ESP32)
303300

304301
{ board_t::board_M5StickCPlus2 , GPIO_NUM_4 },
305302
{ board_t::board_M5Paper , GPIO_NUM_2 },
@@ -420,8 +417,7 @@ static constexpr const uint8_t _pin_table_mbus[][31] = {
420417
},
421418
#elif defined (CONFIG_IDF_TARGET_ESP32H2)
422419
#elif defined (CONFIG_IDF_TARGET_ESP32C5)
423-
#elif defined (CONFIG_IDF_TARGET_ESP32S2)
424-
#else
420+
#elif !defined (CONFIG_IDF_TARGET) || defined (CONFIG_IDF_TARGET_ESP32)
425421
{ board_t::board_M5Stack ,
426422
255 , GPIO_NUM_35,
427423
255 , GPIO_NUM_36,

‎src/gitTagVersion.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
11
#define M5UNIFIED_VERSION_MAJOR 0
22
#define M5UNIFIED_VERSION_MINOR 2
3-
#define M5UNIFIED_VERSION_PATCH 24
3+
#define M5UNIFIED_VERSION_PATCH 25
44
#define M5UNIFIED_VERSION F( M5UNIFIED_VERSION_MAJOR "." M5UNIFIED_VERSION_MINOR "." M5UNIFIED_VERSION_PATCH )

‎src/utility/Mic_Class.inl‎

Lines changed: 20 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -317,13 +317,18 @@ namespace m5
317317
if (_cfg.pin_bck < 0 || _cfg.pin_ws < 0) {
318318
i2s_pdm_rx_config_t i2s_config;
319319
memset(&i2s_config, 0, sizeof(i2s_pdm_rx_config_t));
320-
#if defined ( CONFIG_IDF_TARGET_ESP32P4 ) || defined (CONFIG_IDF_TARGET_ESP32H2)
321320
i2s_config.clk_cfg.clk_src = i2s_clock_src_t::I2S_CLK_SRC_DEFAULT;
322-
#else
323-
i2s_config.clk_cfg.clk_src = i2s_clock_src_t::I2S_CLK_SRC_PLL_160M;
324-
#endif
321+
#if defined ( M5UNIFIED_I2S_PLL_D2_HZ )
325322
i2s_config.clk_cfg.sample_rate_hz = 48000; // dummy setting
326323
i2s_config.clk_cfg.mclk_multiple = i2s_mclk_multiple_t::I2S_MCLK_MULTIPLE_128; // dummy setting
324+
#else
325+
// No verified raw clock recipe on this chip: the driver keeps the clock, so the real
326+
// port rate (over_sampling included, as the capture task expects) goes in here.
327+
// DSR 16 matches what the raw path selects.
328+
i2s_config.clk_cfg.sample_rate_hz = _calc_rec_rate();
329+
i2s_config.clk_cfg.mclk_multiple = i2s_mclk_multiple_t::I2S_MCLK_MULTIPLE_256;
330+
i2s_config.clk_cfg.dn_sample_mode = i2s_pdm_dsr_t::I2S_PDM_DSR_16S;
331+
#endif
327332
i2s_config.slot_cfg.data_bit_width = i2s_data_bit_width_t::I2S_DATA_BIT_WIDTH_16BIT;
328333
i2s_config.slot_cfg.slot_bit_width = i2s_slot_bit_width_t::I2S_SLOT_BIT_WIDTH_16BIT;
329334
i2s_config.slot_cfg.slot_mode = (_cfg.stereo) ? i2s_slot_mode_t::I2S_SLOT_MODE_STEREO : i2s_slot_mode_t::I2S_SLOT_MODE_MONO;
@@ -336,14 +341,9 @@ if (_cfg.pin_bck < 0 || _cfg.pin_ws < 0) {
336341
{
337342
i2s_std_config_t i2s_config;
338343
memset(&i2s_config, 0, sizeof(i2s_std_config_t));
339-
#if defined ( CONFIG_IDF_TARGET_ESP32P4 ) || defined (CONFIG_IDF_TARGET_ESP32H2)
340344
i2s_config.clk_cfg.clk_src = i2s_clock_src_t::I2S_CLK_SRC_DEFAULT;
341-
#else
342-
i2s_config.clk_cfg.clk_src = i2s_clock_src_t::I2S_CLK_SRC_PLL_160M;
343-
#endif
344-
#if defined ( CONFIG_IDF_TARGET_ESP32P4 )
345-
{ // ESP32-P4 はクロックをドライバ管理で最終値に確定させる (mic_task での raw 分周
346-
// 上書きを行わない)。クロック源既定 (minimum supported revision < 3 のビルドは
345+
#if M5UNIFIED_I2S_DRIVER_MANAGED_CLK
346+
{ // クロックをドライバ管理で最終値に確定させる (mic_task での raw 分周上書きを行わない)。クロック源既定 (minimum supported revision < 3 のビルドは
347347
// XTAL 40MHz / rev >= 3 ビルドは PLL_F160M) もドライバに委ねる。
348348
int os = _cfg.over_sampling;
349349
if (os < 1) { os = 1; } else if (os > 8) { os = 8; }
@@ -458,6 +458,7 @@ if (_cfg.pin_bck < 0 || _cfg.pin_ws < 0) {
458458

459459
bool use_pdm = (self->_cfg.pin_bck < 0 && !self->_cfg.use_adc);
460460

461+
#if defined ( M5UNIFIED_I2S_PLL_D2_HZ )
461462
static constexpr uint32_t PLL_D2_CLK = M5UNIFIED_I2S_PLL_D2_HZ;
462463

463464
uint32_t bits = (self->_cfg.use_adc) ? 1 : 16; /// 1サンプリング当たりの出力ビット数;
@@ -473,6 +474,7 @@ if (_cfg.pin_bck < 0 || _cfg.pin_ws < 0) {
473474
// read here: a queued record() with a new rate may overwrite it while
474475
// this request is still being captured.
475476
calcClockDiv(&div_a, &div_b, &div_n, PLL_D2_CLK / (bits * div_m), self->_rec_sample_rate);
477+
#endif
476478

477479
// false when the raw clock latch below times out: the channel must not
478480
// report itself active with an unlatched clock configuration.
@@ -489,7 +491,10 @@ if (_cfg.pin_bck < 0 || _cfg.pin_ws < 0) {
489491
#endif
490492
#endif
491493

492-
#if defined (M5UNIFIED_I2S_HW_V2)
494+
#if !defined ( M5UNIFIED_I2S_PLL_D2_HZ )
495+
// No verified raw recipe for this chip: the driver keeps the mode and clock it configured.
496+
(void)dev; (void)use_pdm;
497+
#elif defined (M5UNIFIED_I2S_HW_V2)
493498

494499
dev->rx_conf.rx_pdm_en = use_pdm;
495500
dev->rx_conf.rx_tdm_en = !use_pdm;
@@ -500,9 +505,9 @@ if (_cfg.pin_bck < 0 || _cfg.pin_ws < 0) {
500505
dev->rx_conf.rx_pdm2pcm_en = use_pdm;
501506
dev->rx_conf.rx_pdm_sinc_dsr_16_en = 1;
502507
#endif
503-
#if defined (CONFIG_IDF_TARGET_ESP32P4)
504-
// ESP32-P4 の std 経路はクロックを _setup_i2s でドライバ管理により最終値に
505-
// 設定済みのため、raw 分周の上書きを行わない (PDM 経路は従来どおり)。
508+
#if M5UNIFIED_I2S_DRIVER_MANAGED_CLK
509+
// std 経路はクロックを _setup_i2s でドライバ管理により最終値に設定済みのため、
510+
// raw 分周の上書きを行わない (PDM 経路は従来どおり)。
506511
const bool skip_raw_clk = !use_pdm;
507512
#else
508513
const bool skip_raw_clk = false;

‎src/utility/Power_Class.hpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -132,9 +132,12 @@ namespace m5
132132
void setLed(uint8_t brightness = 255);
133133

134134
/// all power off.
135+
/// @note PowerHub enters light sleep after requesting power-off and restarts if it wakes.
135136
void powerOff(void);
136137

137138
/// sleep and timer boot. The boot condition can be specified by the argument.
139+
/// @note PowerHub paces alarm writes by 50 ms, settles for 500 ms before requesting
140+
/// power-off, then enters light sleep and restarts if it wakes.
138141
/// @param seconds Number of seconds to boot.
139142
void timerSleep(int seconds);
140143

‎src/utility/Power_Class.inl‎

Lines changed: 12 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1693,11 +1693,18 @@ namespace m5
16931693

16941694
#if defined (CONFIG_IDF_TARGET_ESP32S3)
16951695
case board_t::board_M5PowerHub:
1696-
uint8_t buf[6]={};
1697-
M5.In_I2C.writeRegister(powerhub_i2c_addr, 0x00, buf, sizeof(buf), i2c_freq);
1698-
M5.In_I2C.writeRegister8(powerhub_i2c_addr, 0xE0, 1, i2c_freq);
1699-
use_deepsleep = false;
1700-
break;
1696+
{
1697+
// The STM32 arms the RTC alarm asynchronously after acknowledging the writes.
1698+
// Let it finish before the power-off request can overtake the alarm update.
1699+
static constexpr uint32_t powerhub_alarm_settle_ms = 500;
1700+
if (withTimer) { m5gfx::delay(powerhub_alarm_settle_ms); }
1701+
uint8_t buf[6]={};
1702+
M5.In_I2C.writeRegister(powerhub_i2c_addr, 0x00, buf, sizeof(buf), i2c_freq);
1703+
M5.In_I2C.writeRegister8(powerhub_i2c_addr, 0xE0, 1, i2c_freq);
1704+
// Do not resume the sketch with outputs off and the alarm still armed.
1705+
use_deepsleep = false;
1706+
break;
1707+
}
17011708
#endif
17021709
}
17031710

‎src/utility/Speaker_Class.inl‎

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -202,14 +202,12 @@ namespace m5
202202

203203
i2s_std_config_t i2s_config;
204204
memset(&i2s_config, 0, sizeof(i2s_std_config_t));
205-
#if defined ( CONFIG_IDF_TARGET_ESP32H2 ) || defined ( CONFIG_IDF_TARGET_ESP32P4 )
205+
// On every chip whose raw divider path runs (M5UNIFIED_I2S_PLL_D2_HZ), I2S_CLK_SRC_DEFAULT
206+
// is the PLL_160M source that path expects, so no chip list is needed here. (The ESP32-P4
207+
// default is chosen at run time, which is why its clock stays driver managed.)
206208
i2s_config.clk_cfg.clk_src = i2s_clock_src_t::I2S_CLK_SRC_DEFAULT;
207-
#else
208-
i2s_config.clk_cfg.clk_src = i2s_clock_src_t::I2S_CLK_SRC_PLL_160M;
209-
#endif
210-
#if defined ( CONFIG_IDF_TARGET_ESP32P4 )
211-
// ESP32-P4 はクロックをドライバ管理で最終値に確定させる (spk_task での raw 分周
212-
// 上書きを行わない)。ここで実レートを渡すことで、begin 中のクロック遷移が
209+
#if M5UNIFIED_I2S_DRIVER_MANAGED_CLK
210+
// クロックをドライバ管理で最終値に確定させる (spk_task での raw 分周上書きを行わない)。ここで実レートを渡すことで、begin 中のクロック遷移が
213211
// 一度きりになり、外付け codec (Tab5=ES8388) のロック失敗を防ぐ。
214212
// クロック源既定 (minimum supported revision < 3 のビルドは XTAL 40MHz /
215213
// rev >= 3 ビルドは PLL_F160M) もドライバに委ねる。
@@ -400,7 +398,7 @@ namespace m5
400398
#else
401399
const i2s_port_t i2s_port = self->_cfg.i2s_port;
402400

403-
#if defined (CONFIG_IDF_TARGET_ESP32P4)
401+
#if M5UNIFIED_I2S_DRIVER_MANAGED_CLK
404402
// クロックは _setup_i2s でドライバ管理により最終値に設定済み (実レート +
405403
// 256fs、40MHz source ビルドの高レートのみ 128fs)。
406404
// ドライバの分数分周 (a/b ≤ 511) は十分高精度のため、レート換算は公称値でよい。
@@ -537,7 +535,7 @@ namespace m5
537535
dev->conf.tx_fifo_reset = 0;
538536

539537
#endif
540-
#endif // !CONFIG_IDF_TARGET_ESP32P4 (raw クロック設定ブロック全体)
538+
#endif // !M5UNIFIED_I2S_DRIVER_MANAGED_CLK (raw クロック設定ブロック全体)
541539
// i2s_zero_dma_buffer(i2s_port);
542540

543541
enum spk_i2s_state

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