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arm/stm32h7: Allow PendSV with high-priority interrupts. by jsanchez-2g · Pull Request #20496 · apache/nuttx · GitHub
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arm/stm32h7: Allow PendSV with high-priority interrupts. - #20496

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acassis merged 1 commit into
apache:masterfrom
jsanchez-2g:upstream/stm32h7-hipri-pendsv
Oct 8, 2026
Merged

acassis merged 1 commit into
apache:masterfrom
jsanchez-2g:upstream/stm32h7-hipri-pendsv

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Summary

STM32H7 debug builds panic on a legitimate PendSV when CONFIG_ARCH_HIPRI_INTERRUPT=y. The common ARMv7-M arm_doirq() dispatches the interrupt for deferred processing, but the STM32H7 handler unconditionally calls PANIC().

Guard the panic with #ifndef CONFIG_ARCH_HIPRI_INTERRUPT. The handler returns normally when high-priority interrupt support is enabled; the fatal diagnostic remains when it is disabled. No Apps changes are required.

Impact

Fixes STM32H7 behavior with debug and high-priority interrupts enabled. No new feature, API, configuration option, build procedure, documentation requirement, or user migration. No intended security or compatibility change.

Testing

Hardware: 2G Conductor, STM32H743BI, out-of-tree conductor:G005251/conductor_lua_eth configuration with CONFIG_DEBUG_FEATURES=y and CONFIG_ARCH_HIPRI_INTERRUPT=y.

Before: build 834 (NuttX 12.10.0-based 2G integration, 2026-10-02) built successfully but repeatedly panicked during early boot. The captured serial output includes:

Trying W25 flash
stm32_pendsv: PANIC!!! PendSV received
dump_assert_info: Current Version: NuttX  12.10.0 955452ac77c-dirty Oct  2 2026 14:32:09 arm

After: the identical two-line guard was applied in build 835, which the board operator reported passed hardware verification on 2026-10-02. No passing serial capture was supplied. It remained applied through checkpoint-06 build 866, built using make -j1 V=1 on Linux x86_64 with arm-none-eabi-gcc 13.2.1, and hardware verified by the board operator on 2026-10-07. Archived ELF, BIN, HEX, map, configuration, checksums, build logs, and acceptance records identify the tested images.

Build 866 completed compilation, linking, and HEX/BIN generation with exit status 0. All 41 host regression tests passed, including the PendSV handler test for high-priority interrupts enabled and disabled.

These test images contain other 2G integration changes and local patches. They are not builds of the isolated Apache-master PR branch. The historical failure predates the Apache master baseline; current source inspection confirms the unconditional handler remains. There is no claim of captured passing runtime logs or pristine-Apache before/after hardware testing.

PR verification Self-Check

  • This PR introduces only one functional change.
  • Summary and impact describe the final change.
  • Contribution checks and human sign-off complete.
  • Work in progress.
  • Ready for review; testing scope and evidence limitations are disclosed above.

With CONFIG_ARCH_HIPRI_INTERRUPT enabled, arm_doirq() dispatches PendSV
for deferred processing. The STM32H7 debug handler unconditionally panics
on that valid interrupt, preventing normal operation with debug enabled.

Guard the panic with CONFIG_ARCH_HIPRI_INTERRUPT, allowing the common
interrupt path to finish signal delivery and context switching. Preserve
the diagnostic when high-priority interrupts are disabled.

Assisted-by: Codex:GPT-6
Signed-off-by: jsanchez-2g <jsanchez@2g-eng.com>
@github-actions github-actions Bot added Arch: arm Issues related to ARM (32-bit) architecture Size: XS The size of the change in this PR is very small labels Oct 7, 2026
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github-actions Bot commented Oct 7, 2026

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MemBrowse Memory Report

No memory changes detected for:

@acassis

acassis commented Oct 8, 2026

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Good finding @jsanchez-2g

@acassis
acassis merged commit 6e41066 into apache:master Oct 8, 2026
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Arch: arm Issues related to ARM (32-bit) architecture Size: XS The size of the change in this PR is very small

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3 participants