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Adds optional Zacas support to the JIT, allowing existing 32-bit and 64-bit Interlocked.CompareExchange intrinsics to use amocas.w and amocas.d
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BTW, I'm fixing another CAS issue with checked build, which will give you a conflict #137318. |
It's merged, please resolve conflicts and merge upstream main. When resolving, keep the |
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Conflicts resolved, thank you for the heads up |
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Formatting failure is related; you can apply the patch it has created and push. |
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Ah, I see. Will be on the lookout |
| @@ -525,21 +527,27 @@ int LinearScan::BuildNode(GenTree* tree) | |||
| { | |||
| srcCount++; | |||
| RefPosition* use = BuildUse(comparand); | |||
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For the Zacas path, consider tgtPrefUse = use; here. amocas.w/d uses rd as both the comparand source and the destination (see the register operand table in rvwmo.adoc and zacas.adoc), so preferencing the target to the comparand register lets the mov in codegen be elided in the common case.
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reran the tests locally, tgtPrefUse = use improved 10 out of 314 test cases (passing result to non-inlined methods), others were identical.
Current tests did not catch any difference, not it sure if it justifies adding another one
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Thanks. No need for another test, tgtPrefUse is only an allocation hint, and the existing KeepLive/Discard/SameOperand cases already cover both the shared and non-shared register paths for correctness.
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LGTM, my (RVA22) device doesn't have Zacas, maybe @filipnavara if you could give it a try on yours, that would be great. I'm running AOT smoke tests against this PR's branch, let's see: linux-riscv64: https://github.com/am11/CrossRepoCITesting/actions/runs/43275277170 Update: both passed, ✅ |
tomeksowi
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nice to see another RVA23 extension supported
| // NOTE: `genConsumeAddress` marks consumed register as not a GC pointer, assuming the input | ||
| // registers die at the first generated instruction. However, here the input registers are reused, | ||
| // so mark the location register as a GC pointer until code generation for this node is finished. | ||
| gcInfo.gcMarkRegPtrVal(loc, locOp->TypeGet()); |
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IIRC it's because LR/SC compare-and-swap was a loop, may be safe to do only under !useZacas
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I think it's still needed for Zacas. genConsumeAddress assumes the address dies at the first emitted instruction, but here loc is only read by amocas, after the comparand mov and the fence. In fully interruptible code, a GC between those could move the object while loc isn't reported, so I'd keep marking it unconditionally.
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Ideally small types should be handled in a followup too to keep them consistent. |
I am away from my device farm and mostly offline till the end of the month, unfortunately. |
Adds initial Zacas support for the existing 32-bit and 64-bit
Interlocked.CompareExchangeintrinsics on RISC-V64.When Zacas is available, the JIT emits
amocas.woramocas.din place of thelr/scretry loopPR largely follows the previous Zicond bring up work (#128799)
added
riscv_hwprobe, instruction set metadata, and runtime/compiler configurationamocasinstruction emission and disassemblyThe
amocassequence uses .aqrl and a preceding fence rw,rw. The fence orders preceding accesses before the comparison read even when the comparison fails, since a failedamocasdoes not provide release semantics by itself.Zacas is enabled when detected and can be disabled with
DOTNET_EnableRiscV64Zacas=0.Validated on QEMU with Crossgen2, covering the Zacas path, lr/sc fallback, register stress, and four hart contention. With and without Zacas enablement.
Checked feature detection using mocked riscv_hwprobe responses with older, newer, and unavailable hwprobe headers
resolves #137345