<div class="prc-Truncate-Truncate-2G1eo" title="Issues" style="--truncate-max-width:100%">Issues

intel/intel-xpu-backend-for-triton#8389 · opened

on Oct 12, 2026

[triton-ext] Set up the extension's test infrastructure

intel/intel-xpu-backend-for-triton#8386 · opened

on Oct 12, 2026

[triton-ext] Move the `tt.no_licm` exception out of core's LICM

intel/intel-xpu-backend-for-triton#8385 · opened

on Oct 12, 2026

[triton-ext] Let the backend map its layouts back to Gluon

Feature

intel/intel-xpu-backend-for-triton#8384 · opened

on Oct 12, 2026

[triton-ext] Accept the backend's kernel handles in Proton's metric kernels

Feature

intel/intel-xpu-backend-for-triton#8383 · opened

on Oct 12, 2026

fused_moe.patch incorrectly modifies += tl.dot(a, b) to tl.dot(a, b, acc)

intel/intel-xpu-backend-for-triton#8380 · opened

on Oct 12, 2026

[Benchmarks] gemm-postop-addmatrix bfloat16 OOMs on B60 for shape [4096, 8, 128, 16384]

intel/intel-xpu-backend-for-triton#8378 · opened

on Oct 11, 2026

· 7. CI and Tooling

[Windows] Invalid SPIR-V module: input SPIR-V module uses unknown extension 'SPV_EXT_long_vector'

intel/intel-xpu-backend-for-triton#8376 · opened

on Oct 10, 2026

1

[Pytorch][Accuracy][BMG] Masked broadcast FP16 load produces incorrect results for XBLOCK <= 128

intel/intel-xpu-backend-for-triton#8374 · opened

on Oct 10, 2026

[ReorderInstructions] Shared-alloc hoist exposes missing cross-warp barrier in Intel membar, wrong gradients in attention backward

intel/intel-xpu-backend-for-triton#8373 · opened

on Oct 10, 2026

1

[SymbolicBounds] Add a trip-count query to the symbolic bounds prover

intel/intel-xpu-backend-for-triton#8372 · opened

on Oct 9, 2026

· 4. [Performance] Core

IntegerRangeAnalysis aborts on integer types wider than 64 bits

intel/intel-xpu-backend-for-triton#8368 · opened

on Oct 9, 2026

[triton-ext] Use FPSan's i8 MMA decomposition only on CUDA targets

intel/intel-xpu-backend-for-triton#8366 · opened

on Oct 9, 2026

[vLLM] Watermarking unit tests out of sync with vLLM APIs at the current pin

intel/intel-xpu-backend-for-triton#8362 · opened

on Oct 8, 2026

[vLLM] DCP packed all-to-all test expects LSE in the input dtype, kernel returns float32

intel/intel-xpu-backend-for-triton#8361 · opened

on Oct 8, 2026

[vLLM] int4 per-token-head unified attention test exceeds tolerance on one element

intel/intel-xpu-backend-for-triton#8358 · opened

on Oct 8, 2026

[vLLM][moe] Gemma4 routing test: bf16/fp16 ties at the top-k boundary select a different expert

intel/intel-xpu-backend-for-triton#8357 · opened

on Oct 8, 2026

[vLLM][moe] Zero-expert MoE test copies `w13` weights between layers with different XPU layouts

intel/intel-xpu-backend-for-triton#8356 · opened

on Oct 8, 2026

[vLLM] CI HF token has no access to gated model `google/embeddinggemma-300m`

intel/intel-xpu-backend-for-triton#8355 · opened

on Oct 8, 2026

[vLLM] `maybe_execute_in_parallel` uses `torch.cuda.stream`, which fails on XPU

intel/intel-xpu-backend-for-triton#8354 · opened

on Oct 8, 2026

[vLLM] DeepSeek-V4 compressor/indexer cache tests produce wrong results on XPU

intel/intel-xpu-backend-for-triton#8353 · opened

on Oct 8, 2026

[vLLM] DeepSeek-V4 NVFP4 KV-cache Triton kernels use NVIDIA PTX inline assembly

intel/intel-xpu-backend-for-triton#8352 · opened

on Oct 8, 2026

[vLLM] Kernel tests call `_C` ops that `vllm-xpu-kernels` does not provide

intel/intel-xpu-backend-for-triton#8351 · opened

on Oct 8, 2026

· [PT 2.15]

1

[vLLM] Re-run XE-Forge on `batched-moe` kernel

intel/intel-xpu-backend-for-triton#8347 · opened

on Oct 8, 2026

`Pass rate` step fails in `Test with pip on Windows` workflow